Most DLSim 3 components support an edge triggering option on their action menus. With edge triggering, one particular input is designated as the "clock". State changes will only occur on up (<), down (>), or dual (<>) clock edges.
This example shows a clocked SR latch in which the circled inputs have been designated as clock inputs for up (<) edge triggering.
In the situation pictured below the S input goes high after Cl. Because of edge triggering, the output is not synchronized until after the next clock cycle