Introduction to Computer Architecture

Computer Science 210
Spring, 2018

Course Objectives

Grading Procedures

Your grade will be based on labs, problem sets, and and two exams.

Point breakdown (tentative):

Labs and problem sets
Midterm Exam (March 14)
Final Exam (May 16, 9 am)


Assignments in the course will consist of written problem sets and hands-on labs.  Problem sets must be turned in at the beginning of (or prior to) lecture on the day they are due.  Late problem sets are not accepted.

Late labs are strongly discouraged, but will be accepted subject to the following limitations:

Regular class attendance and participation is expected.  Excessive absence may result in a lower final grade.

Student Disabilities

If you have a disability that might impact your performance in this course, or requires special accommodation, please contact me as soon as possible so that appropriate arrangements can be made.  Support is available through Student Academic Services.  You will need to contact them to get your disability documented before accommodations can be made.

Academic integrity

All work in this course is to be performed in accordance with the college's Oberlin Honor Code.  You must write the Honor Pledge and sign it at the end of every submission.  Electronic submissions must include the honor pledge in the comments and your name.  The pledge is "I have adhered to the Honor Code in this assignment."

In particular, on all of the exams you are responsible for your own work; you may neither give nor receive aid during the course of the exam.  No electronic devices are permitted in exams.

That being said, in a hands-on course such as this one, some discussion of lab assignments is expected and encouraged.  A few specific do's and don't's:

In the end, the work you submit must be your own.  If you're not sure what is acceptable in a given situation, please ask me about it.

Course outline

  1. Introduction to computer architecture.  Basic computer components. Levels of abstraction.  (chapter 1)
  2. Data representation.  (chapter 2)
  3. The MIPS architecture.  Assembly language programming.  (chapter 2)
  4. Digital logic.  (appendix B)
  5. CPU design.  (chapter 4)
  6. Advanced CPU design.  Pipelining.  (chapter 4)
  7. Memory systems.  Cache memory.  (chapter 5)